The present invention relates to a programmable frequency divider for producing a desired output frequency which is a variable integral submultiple of the input frequency.
One conventional means for dividing high frequencies is known as a programmable frequency divider, called an early-decode programmable divider, for dividing a high input frequency directly into a desired output frequency. Such a programmable frequency divider is also referred to as a direct programmable frequency divider.
The programmable frequency divider comprises a pulse counter which is composed of T-type flip-flops connected in cascade. The pulse counter is first preset to a division ratio signal. When the pulse counter counts down to zero, it is preset to the division ratio signal again.
According to another programmable frequency divider which also comprises a pulse counter in the form of cascaded T-type flip-flops, the pulse counter is first preset to a division ratio signal, and when the pulse counter counts down to 2, the remaining pulses are counted by a shift register, during which time the pulse counter is preset to the division ratio signal again.
The conventional programmable frequency dividers are operable under increased maximum frequencies. However, if much higher frequencies are to be divided, the time required for signal processing, i.e., to preset the pulse counter to a division ratio signal, will cause an appreciable delay. Due to such a delay in signal processing, there are not presently available any direct variable frequency dividers which can operate at a maximum frequency of few hundreds MHz.
For processing signals of higher maximum frequencies, it has been customary to employ a prescaler, a frequency mixer, or the like to convert a higher input frequency into a lower output frequency. Such a circuit arrangement is complex and large in scale, and involves a large number of signal processing cycles. There has been a demand for a programmable frequency divider which will eliminates these drawbacks.